Vivado的使用—以流水灯为例

1. 打开vivado，打开已有工程或者新建工程。
当工程存在时选择Open Project打开.xpr文件。
当新建工程时，选择Create New Project（以下为新建工程及文件的操作步骤）。

3.案例-流水灯程序代码及仿真结果
`timescale 1ns / 1ps
//
//流水灯，四个灯依次点亮
// Module Name: led_test
//

module led_test(
clk, //时钟
reset, //复位
led //输出状态灯
);
input clk;
input reset;
output [3:0] led;
reg [3:0] led;
reg [11:0] counter; //计数器
reg [2:0] state; //状态控制
//计数器
always @(posedge clk or negedge reset)
begin
if(!reset) begin
counter <= 12’d0;
end
else if ( counter == 12’d100) begin
counter <= 12’d0;
end
else begin
counter <= counter + 12’d1;
end
end
//状态跳转，通过计数器的计数值决定
always @(posedge clk or negedge reset)
begin
if(!reset) begin
state <= 3’d0;
end
else if( counter < 12’d20 )
state <= 3’d0;
else if( counter >= 12’d20 && counter < 12’d40 )
state <= 3’d1;
else if( counter >= 12’d40 && counter < 12’d60 )
state <= 3’d2;
else if( counter >= 12’d60 && counter < 12’d80 )
state <= 3’d3;
else if( counter >= 12’d80 && counter < 12’d100 )
state <= 3’d4;
end
//led状态控制
always @(posedge clk or negedge reset)
begin
if(!reset) begin
led <= 4’b1111;
end
else begin
case(state)
3’d0:led <= 4’b1110; //led低电平时点亮，默认状态为灭
3’d1:led <= 4’b1101; //以下为依次点亮各灯
3’d2:led <= 4’b1011;
3’d3:led <= 4’b0111;
3’d4:led <= 4’b1111;
default:led <= 4’b1111;
endcase
end
end

endmodule

顶层测试文件
`timescale 1ns / 1ps
module test_led;
reg clk;
reg reset;
wire [3:0] led;

initial begin
clk = 1’b0;
reset = 1’b0;
repeat(10) @(posedge clk);
reset = 1’b1;
repeat(1000) @(posedge clk);
$finish;
end
always #10 clk = ~clk;

led_test u0 (
.clk(clk),
.reset(reset),
.led(led)
);
endmodule